Reconfigurable Networks-on-Chip

Reconfigurable Networks-on-Chip

2012

Hardback (17 Dec 2011)

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Publisher's Synopsis

This book provides a comprehensive survey of recent progress in the design and implementation of Networks-on-Chip. It addresses a wide spectrum of on-chip communication problems, ranging from physical, network, to application layers. Specific topics that are explored in detail include packet routing, resource arbitration, error control/correction, application mapping, and communication scheduling. Additionally, a novel bi-directional communication channel NoC (BiNoC) architecture is described, with detailed explanation.

  • Written for practicing engineers in need of practical knowledge about the design and implementation of networks-on-chip;
  • Includes tutorial-like details to introduce readers to a diverse range of NoC designs, as well as in-depth analysis for designers with NoC experience to explore advanced issues;
  • Describes a variety of on-chip communication architectures, including a novel bi-directional communication channel NoC. 

From the Foreword:

Overall this book shows important advances over the state of the art that will affect future system design as well as R&D in tools and methods for NoC design. It represents an important reference point for both designers and electronic design automation researchers and developers.

--Giovanni De Micheli

Book information

ISBN: 9781441993403
Publisher: Springer New York
Imprint: Springer
Pub date:
Edition: 2012
DEWEY: 621.3815
DEWEY edition: 23
Language: English
Number of pages: 203
Weight: 462g
Height: 242mm
Width: 167mm
Spine width: 19mm