Sub-100Nm Cmos

Sub-100Nm Cmos

null (31 Mar 2000)

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Publisher's Synopsis

This videotaped tutorial begins by reviewing historic trends in CMOS device scaling and identifying the characteristics and requirements of sub-100nm transistors, including both device and circuit considerations, and gate oxide scaling and scaling source/drain regions and optimizing well profiles.

Book information

ISBN: 9780780361386
Publisher: I.E.E.E.Press
Imprint: I.E.E.E.Press
Pub date:
Language: English
Weight: -1g