Planar Double-Gate Transistor

Planar Double-Gate Transistor From Technology to Circuit

2009

Hardback (30 Jan 2009)

  • $190.34
Add to basket

Includes delivery to the United States

10+ copies available online - Usually dispatched within 7 days

Publisher's Synopsis

Until the 1990s, the reduction of the minimum feature sizes used to fabricate in- grated circuits, called "scaling", has highlighted serious advantages as integration density, speed, power consumption, functionality and cost. Direct consequence was the decrease of cost-per-function, so the electronic productivity has largely progressed in this period. Another usually cited trend is the evolution of the in- gration density as expressed by the well-know Moore's Law in 1975: the number of devices per chip doubles every 2 years. This evolution has allowed improving signi?cantly the circuit complexity, offering a great computing power in the case of microprocessor, for example. However, since few years, signi?cant issues appeared such as the increase of the circuit heating, device complexity, variability and dif?culties to improve the integration density. These new trends generate an important growth in development and production costs. Though is it, since 40 years, the evolution of the microelectronics always f- lowed the Moore's law and each dif?culty has found a solution.

Book information

ISBN: 9781402093272
Publisher: Springer Netherlands
Imprint: Springer
Pub date:
Edition: 2009
DEWEY: 621.3815282
DEWEY edition: 22
Language: English
Number of pages: 211
Weight: 1090g
Height: 234mm
Width: 156mm
Spine width: 14mm