Phase-Locked Loop Synthesizer Simulation

Phase-Locked Loop Synthesizer Simulation - McGraw-Hill Electronic Engineering Series

Hardback (16 May 2005)

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Publisher's Synopsis

Phase locked loops (PLLs) are electronic circuits that ensure that a communications signal stays locked on a given frequency. Their design is crucial to the workings of wireless communications systems. Virtually all transceivers use PLLs to synthesize the stable, high frequency oscillations necessary for radio & wireless. This book describes how to calculate PLL performances by using standard mathematical or circuit analysis programs. Theoretical descriptions are limited to the minimum needed to explain how to perform calculations. Although presented methods of analysis can be implemented with many commercial programs, their description always refers to Mathcad and SIMetrix.

Book information

ISBN: 9780071453714
Publisher: McGraw-Hill Education
Imprint: McGraw Hill
Pub date:
DEWEY: 621.3815364
DEWEY edition: 22
Number of pages: 227
Weight: 499g
Height: 229mm
Width: 155mm
Spine width: 24mm