Designing VLSI Network Nodes to Reduce Memory Traffic in a Shared Memory Parallel Computer (Classic Reprint)

Designing VLSI Network Nodes to Reduce Memory Traffic in a Shared Memory Parallel Computer (Classic Reprint)

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Publisher's Synopsis

Excerpt from Designing Vlsi Network Nodes to Reduce Memory Traffic in a Shared Memory Parallel Computer

We believe that the increased ?exibility and generality of shared memory designs adequately compensates for their lower peak performance, but this issue has not been settled. Most likely the answer will prove to be so application dependent that both shared and private memory designs will prove successful.

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Book information

ISBN: 9780332315300
Publisher: Fb&c Ltd
Imprint: Forgotten Books
Pub date:
Number of pages: 30
Weight: -1g
Height: 10mm
Width: 6mm
Spine width: 1mm